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[GlobalIsel][X86] selectDivRem - fix typo in 64-bit AH handling code
authorSimon Pilgrim <llvm-dev@redking.me.uk>
Sun, 18 Jun 2023 16:37:17 +0000 (17:37 +0100)
committerSimon Pilgrim <llvm-dev@redking.me.uk>
Sun, 18 Jun 2023 16:37:17 +0000 (17:37 +0100)
commitfb60dda1893eb9d0420de25b84fb023dc8424aeb
tree07826a10d8b5d2817d709f1939859c7f7e381c1etree | snapshot
parent46479ea785efe834bfc65b2dc53a70a1b8210319commit | diff
[GlobalIsel][X86] selectDivRem - fix typo in 64-bit AH handling code

This function was lifted from fast-isel, and still referred to the Instruction::SRem/URrem opcodes, instead of the G_SREM/G_UREM opcodes.

But it turns out these aren't necessary at all as only the G_SREM/G_UREM codepaths will use the AH register for DivRemResultReg anyhow.
llvm/lib/Target/X86/X86InstructionSelector.cpp diff | blob | history
llvm/test/CodeGen/X86/GlobalISel/x86_64-select-srem.mir diff | blob | history
llvm/test/CodeGen/X86/GlobalISel/x86_64-select-urem.mir diff | blob | history
Domain: System / Toolchain;