Promote bf16 to f32 when the target doesn't support it
authorBenjamin Kramer <benny.kra@googlemail.com>
Fri, 3 Jun 2022 08:47:22 +0000 (10:47 +0200)
committerBenjamin Kramer <benny.kra@googlemail.com>
Wed, 15 Jun 2022 10:56:31 +0000 (12:56 +0200)
commitfb34d531af953119593be74753b89baf99fbc194
tree9081dac67c376f4fde9303c4b3090a7cac7db575
parent43e7ba6495359bcc14580725468e7736e97edcc6
Promote bf16 to f32 when the target doesn't support it

This is modeled after the half-precision fp support. Two new nodes are
introduced for casting from and to bf16. Since casting from bf16 is a
simple operation I opted to always directly lower it to integer
arithmetic. The other way round is more complicated if you want to
preserve IEEE semantics, so it's handled by a new __truncsfbf2
compiler-rt builtin.

This is of course very bare bones, but sufficient to get a semi-softened
fadd on x86.

Possible future improvements:
 - Targets with bf16 conversion instructions can now make fp_to_bf16 legal
 - The software conversion to bf16 can be replaced by a trivial
   implementation under fast math.

Differential Revision: https://reviews.llvm.org/D126953
compiler-rt/lib/builtins/CMakeLists.txt
compiler-rt/lib/builtins/fp_trunc.h
compiler-rt/lib/builtins/truncsfbf2.c [new file with mode: 0644]
llvm/include/llvm/CodeGen/ISDOpcodes.h
llvm/include/llvm/IR/RuntimeLibcalls.def
llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
llvm/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp
llvm/lib/CodeGen/TargetLoweringBase.cpp
llvm/lib/Target/X86/X86ISelLowering.cpp
llvm/test/CodeGen/X86/bfloat.ll [new file with mode: 0644]