clk: microchip: mpfs: convert parent rate acquistion to get_get_rate()
authorConor Dooley <conor.dooley@microchip.com>
Tue, 25 Oct 2022 07:58:45 +0000 (08:58 +0100)
committerLeo Yu-Chi Liang <ycliang@andestech.com>
Tue, 15 Nov 2022 07:37:17 +0000 (15:37 +0800)
commitfb103971feb637809a96fe739d81fe2f887cf3ac
tree7e74590d70d9d998ee97db5e958e0e32324917c1
parent540d02217f8f997c55818ecd16d8624c520ca750
clk: microchip: mpfs: convert parent rate acquistion to get_get_rate()

Currently the clock driver for PolarFire SoC takes a very naive approach
to the relationship between clocks. It reads the dt to get an input
clock, assumes that that is fixed frequency, reads the "clock-frequency"
property & uses that to set up both the "cfg" and "periph" clocks.

Simplifying for the sake of incremental fixes, the "correct" parentage for
the clocks currently supported in U-Boot is that the "cfg" clocks should
be children of the fixed frequency clock in the dt. The AHB clock is one
of these "cfg" clocks and is the parent of the "periph" clocks.

Instead of passing the clock rate of the fixed-frequency clock to the
"cfg" and "periph" registration functions and the name of the parents,
pass their actual parents & use clk_get_rate() to determine their parents
rates.

The "periph" clocks are purely gate clocks and should not be reading the
AHB clocks registers to determine their rates, as they can simply report
the output of clk_get_rate() on their parent.

Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Reviewed-by: Padmarao Begari <padmarao.begari@microchip.com>
drivers/clk/microchip/Makefile
drivers/clk/microchip/mpfs_clk.c
drivers/clk/microchip/mpfs_clk.h
drivers/clk/microchip/mpfs_clk_cfg.c
drivers/clk/microchip/mpfs_clk_periph.c