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(parent: 460c81f) | patch
target-mips: add Config5.SBRI
authorLeon Alrae <leon.alrae@imgtec.com>
Fri, 11 Jul 2014 15:11:33 +0000 (16:11 +0100)
committerLeon Alrae <leon.alrae@imgtec.com>
Mon, 3 Nov 2014 11:48:34 +0000 (11:48 +0000)
commitfaf1f68ba11c919191dd7a5f32cfd0b6401c4827
tree2d11408d89c356662b3f0a74253151b624bb8243tree | snapshot
parent460c81f14a74f671d14bad3a3fb4502292d7a355commit | diff
target-mips: add Config5.SBRI

SDBBP instruction Reserved Instruction control. The purpose of this field is
to restrict availability of SDBBP to kernel mode operation.

If the bit is set then SDBBP instruction can only be executed in kernel mode.
User execution of SDBBP will cause a Reserved Instruction exception.

Additionally add missing Config4 and Config5 cases for dm{f,t}c0.

Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
Reviewed-by: Yongbok Kim <yongbok.kim@imgtec.com>
target-mips/cpu.h diff | blob | history
target-mips/translate.c diff | blob | history
Domain: SDK / Emulator;