clk: sunxi-ng: a83t: Fix PLL lock status register offset
authorChen-Yu Tsai <wens@csie.org>
Mon, 22 May 2017 06:25:47 +0000 (14:25 +0800)
committerMaxime Ripard <maxime.ripard@free-electrons.com>
Wed, 7 Jun 2017 13:32:16 +0000 (15:32 +0200)
commitfaea8b0e33c2e6a276d34a755258bb2176553616
tree80a71a679631aca7ecc30b114da601f46ef9fbbf
parent05359be1176bd097af9e7e833ff0317c55c5a86c
clk: sunxi-ng: a83t: Fix PLL lock status register offset

The offset for the PLL lock status register was incorrectly set to
0x208, which actually points to an unused register. The correct
register offset is 0x20c.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
drivers/clk/sunxi-ng/ccu-sun8i-a83t.c