[x86] reduce 64-bit mask constant to 32-bits by right shifting

[x86] reduce 64-bit mask constant to 32-bits by right shifting

This is a follow-up from D38181 (r314023). We have to put 64-bit
constants into a register using a separate instruction, so we
should try harder to avoid that.

From what I see, we're not likely to encounter this pattern in the
DAG because the upstream setcc combines from this don't (usually?)
produce this pattern. If we fix that, then this will become more
relevant. Since the cost of handling this case is just loosening
the predicate of the existing fold, we might as well do it now.

llvm-svn: 314064