clk: tegra: pll: Improve PLLM enable-state detection
authorDmitry Osipenko <digetx@gmail.com>
Thu, 9 Jul 2020 17:20:57 +0000 (20:20 +0300)
committerStephen Boyd <sboyd@kernel.org>
Tue, 28 Jul 2020 01:21:17 +0000 (18:21 -0700)
commitfa64023763cf1a3da8bf3341df6c2a47e54fcead
tree649cbb9cb4868faafe57ab0b0a78feb324462993
parentb3a9e3b9622ae10064826dccb4f7a52bd88c7407
clk: tegra: pll: Improve PLLM enable-state detection

Power Management Controller (PMC) can override the PLLM clock settings,
including the enable-state. Although PMC could only act as a second level
gate, meaning that PLLM needs to be enabled by the Clock and Reset
Controller (CaR) anyways if we want it to be enabled. Hence, when PLLM is
overridden by PMC, it needs to be enabled by CaR and ungated by PMC in
order to be functional. Please note that this patch doesn't fix any known
problem, and thus, it's merely a minor improvement.

Link: https://lore.kernel.org/linux-arm-kernel/20191210120909.GA2703785@ulmo/T/
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Link: https://lore.kernel.org/r/20200709172057.13951-1-digetx@gmail.com
Reviewed-by: Jon Hunter <jonathanh@nvidia.com>
Tested-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
drivers/clk/tegra/clk-pll.c