riscv: dts: microchip: reduce the fic3 clock rate
authorConor Dooley <conor.dooley@microchip.com>
Tue, 27 Sep 2022 11:19:20 +0000 (12:19 +0100)
committerConor Dooley <conor.dooley@microchip.com>
Tue, 27 Sep 2022 17:53:58 +0000 (18:53 +0100)
commitfa52935abef422d119dda3c10c02787a86e6289d
treed1facd93dd3ecc68d2657a9175c9f0191662a7da
parentab291621a8b85269496ae9a964b6d49cd1e030c8
riscv: dts: microchip: reduce the fic3 clock rate

For the v2022.09 release of the reference design, the fic3 clock rate
been reduced from 62.5 MHz to 50 MHz as it allows timing to be closed
significantly more quickly by customers who chose to build the
reference design themselves.

Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
arch/riscv/boot/dts/microchip/mpfs-icicle-kit-fabric.dtsi