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(parent: d172270) | patch
[X86] Improved target combine rules for selecting horizontal add/sub.
authorAndrea Di Biagio <Andrea_DiBiagio@sn.scee.net>
Tue, 10 Jun 2014 16:42:57 +0000 (16:42 +0000)
committerAndrea Di Biagio <Andrea_DiBiagio@sn.scee.net>
Tue, 10 Jun 2014 16:42:57 +0000 (16:42 +0000)
commitfa508af0fec7a6efda5ae1be2dac4c43b4a0dfc8
treecd64293521a1231c62cdff8717f2f506792b04d4tree | snapshot
parentd172270c44ad57827539e04bc244aa07e10d37e9commit | diff
[X86] Improved target combine rules for selecting horizontal add/sub.

This patch slightly changes the algorithm introduced at revision 210477
to fix a problem where the algorithm was producing incorrect code for
the VEX.256 encoded versions of horizontal add/sub.

For these cases, we now try to split the two 256-bit vectors into
128-bit chunks before emitting horizontal add/sub dag nodes.

Added a new test case into haddsub-2.ll.

llvm-svn: 210545
llvm/lib/Target/X86/X86ISelLowering.cpp diff | blob | history
llvm/test/CodeGen/X86/haddsub-2.ll diff | blob | history
Domain: System / Toolchain;