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(parent: 6c2b010) | patch
drm/i915: Skip CS verification of L3 bank registers
authorTvrtko Ursulin <tvrtko.ursulin@intel.com>
Wed, 17 Jul 2019 18:06:22 +0000 (19:06 +0100)
committerTvrtko Ursulin <tvrtko.ursulin@intel.com>
Fri, 19 Jul 2019 14:35:20 +0000 (15:35 +0100)
commitfa380486d5f995b6914b4d4149743d330125414e
tree863c1e656b5d3890f9630f5f7d105dde03663c88tree | snapshot
parent6c2b0103ad92b4238c26b0b8f224f4581d98b2fecommit | diff
drm/i915: Skip CS verification of L3 bank registers

Access to 0xb100 - 0xb3ff mmio range is controlled by the MCR selector
which only affects CPU MMIO. Therefore these registers cannot be realiably
read with MI_SRM from the command streamer so skip their verification.

Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20190717180624.20354-5-tvrtko.ursulin@linux.intel.com
drivers/gpu/drm/i915/gt/intel_workarounds.c diff | blob | history
Domain: System / Kernel;