cxl/acpi: Support CXL XOR Interleave Math (CXIMS)
authorAlison Schofield <alison.schofield@intel.com>
Wed, 30 Nov 2022 22:47:25 +0000 (14:47 -0800)
committerDan Williams <dan.j.williams@intel.com>
Sun, 4 Dec 2022 00:54:35 +0000 (16:54 -0800)
commitf9db85bfec0dcc01556a41d23aec47b866ab3569
treef0f5c864740c56254d50998b10f72698297fc8f8
parent7db0aa8cc019f4f926c19989d1c8696d3893d77c
cxl/acpi: Support CXL XOR Interleave Math (CXIMS)

When the CFMWS is using XOR math, parse the corresponding
CXIMS structure and store the xormaps in the root decoder
structure. Use the xormaps in a new lookup, cxl_hb_xor(),
to find a targets entry in the host bridge interleave
target list.

Defined in CXL Specfication 3.0 Section: 9.17.1

Signed-off-by: Alison Schofield <alison.schofield@intel.com>
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Link: https://lore.kernel.org/r/5794813acdf7b67cfba3609c6aaff46932fa38d0.1669847017.git.alison.schofield@intel.com
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
drivers/cxl/acpi.c
drivers/cxl/core/port.c
drivers/cxl/cxl.h