RISC-V: Fix disassemble for c.li, c.andi and c.addiw
authorKito Cheng <kito.cheng@gmail.com>
Wed, 5 Apr 2017 12:58:28 +0000 (20:58 +0800)
committerPalmer Dabbelt <palmer@dabbelt.com>
Thu, 4 May 2017 10:20:30 +0000 (03:20 -0700)
commitf91d48deb29d9e6f4b530f586db0140943ed0d83
tree41c3e2ccd3bc4a9c346d80196851f94c6b220ef4
parent45eba0ab7d26435121facb68847fbd0cd4a313c1
RISC-V: Fix disassemble for c.li, c.andi and c.addiw

ChangeLog

2017-05-03  Kito Cheng  <kito.cheng@gmail.com>

        * riscv-dis.c (print_insn_args): Handle 'Co' operands.
opcodes/ChangeLog
opcodes/riscv-dis.c