RISC-V: Add sscofpmf extension support
authorAtish Patra <atish.patra@wdc.com>
Fri, 27 Aug 2021 22:03:43 +0000 (15:03 -0700)
committerminda.chen <minda.chen@starfivetech.com>
Tue, 3 Jan 2023 06:26:17 +0000 (14:26 +0800)
commitf90b5c68dcce615739e533ad306be090ca1c99a1
tree2ca5311ba3defcfca7e33f18e1257bca5e7cc187
parentcd2df9c82881b630f632fcc85a356b63e52683e7
RISC-V: Add sscofpmf extension support

The sscofpmf extension allows counter overflow and filtering for
programmable counters. Enable the perf driver to handle the overflow
interrupt. The overflow interrupt is a hart local interrupt.
Thus, per cpu overflow interrupts are setup as a child under the root
INTC irq domain.

Signed-off-by: Atish Patra <atish.patra@wdc.com>
Signed-off-by: Atish Patra <atishp@rivosinc.com>
arch/riscv/include/asm/csr.h
arch/riscv/include/asm/hwcap.h
arch/riscv/kernel/cpu.c
arch/riscv/kernel/cpufeature.c
drivers/perf/riscv_pmu_sbi.c
include/linux/perf/riscv_pmu.h