clk: imx8mn: fix int pll clk gate
authorPeng Fan <peng.fan@nxp.com>
Wed, 14 Aug 2019 01:53:12 +0000 (09:53 +0800)
committerShawn Guo <shawnguo@kernel.org>
Mon, 19 Aug 2019 11:57:47 +0000 (13:57 +0200)
commitf8cade831018d80eaa3d9f64dac5a52d8715de55
tree6080ddf070dbdeaff05d124b56cc41f89b12645b
parentbe378b600791044cdc9820fe0ae13efa9e5499aa
clk: imx8mn: fix int pll clk gate

To Frac pll, the gate shift is 13, however to Int PLL the gate shift
is 11.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Jacky Bai <ping.bai@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
drivers/clk/imx/clk-imx8mn.c