clk: mediatek: mt2712: Compress clock arrays entries to 90 columns

clk: mediatek: mt2712: Compress clock arrays entries to 90 columns

Compress the clock arrays entries to allow a maximum of 90 columns:
this greatly increases readability and also generously reduces the
amount of lines.
While at it, also fix some indentation here and there.

This is a cosmetic change. No functional changes.

Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Chen-Yu Tsai <wenst@chromium.org>
Link: https://lore.kernel.org/r/20230306140543.1813621-7-angelogioacchino.delregno@collabora.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>