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(parent: d9445c4) | patch
[AMDGPU] Add f16 support (VI+)
authorKonstantin Zhuravlyov <kzhuravl_dev@outlook.com>
Sun, 13 Nov 2016 07:01:11 +0000 (07:01 +0000)
committerKonstantin Zhuravlyov <kzhuravl_dev@outlook.com>
Sun, 13 Nov 2016 07:01:11 +0000 (07:01 +0000)
commitf86e4b72660390bde899306bb1879da994281b2a
tree59ac334f56039064686b2973accfabfa84e3f4e3tree | snapshot
parentd9445c49ad47c227f5981ad1f8f211dff9aaa9f1commit | diff
[AMDGPU] Add f16 support (VI+)

Differential Revision: https://reviews.llvm.org/D25975

llvm-svn: 286753
60 files changed:
llvm/lib/Target/AMDGPU/AMDGPU.td diff | blob | history
llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp diff | blob | history
llvm/lib/Target/AMDGPU/AMDGPUInstructions.td diff | blob | history
llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp diff | blob | history
llvm/lib/Target/AMDGPU/AMDGPUSubtarget.h diff | blob | history
llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp diff | blob | history
llvm/lib/Target/AMDGPU/SIFoldOperands.cpp diff | blob | history
llvm/lib/Target/AMDGPU/SIISelLowering.cpp diff | blob | history
llvm/lib/Target/AMDGPU/SIISelLowering.h diff | blob | history
llvm/lib/Target/AMDGPU/SIInstrInfo.cpp diff | blob | history
llvm/lib/Target/AMDGPU/SIInstrInfo.td diff | blob | history
llvm/lib/Target/AMDGPU/SIInstructions.td diff | blob | history
llvm/lib/Target/AMDGPU/SIRegisterInfo.td diff | blob | history
llvm/lib/Target/AMDGPU/SIShrinkInstructions.cpp diff | blob | history
llvm/lib/Target/AMDGPU/VOP1Instructions.td diff | blob | history
llvm/lib/Target/AMDGPU/VOP2Instructions.td diff | blob | history
llvm/lib/Target/AMDGPU/VOP3Instructions.td diff | blob | history
llvm/lib/Target/AMDGPU/VOPCInstructions.td diff | blob | history
llvm/test/CodeGen/AMDGPU/fadd.f16.ll [new file with mode: 0644] blob
llvm/test/CodeGen/AMDGPU/fcmp.f16.ll [new file with mode: 0644] blob
llvm/test/CodeGen/AMDGPU/fdiv.f16.ll [new file with mode: 0644] blob
llvm/test/CodeGen/AMDGPU/fmul.f16.ll [new file with mode: 0644] blob
llvm/test/CodeGen/AMDGPU/fp_to_sint.ll diff | blob | history
llvm/test/CodeGen/AMDGPU/fp_to_uint.ll diff | blob | history
llvm/test/CodeGen/AMDGPU/fpext.f16.ll [new file with mode: 0644] blob
llvm/test/CodeGen/AMDGPU/fptosi.f16.ll [new file with mode: 0644] blob
llvm/test/CodeGen/AMDGPU/fptoui.f16.ll [new file with mode: 0644] blob
llvm/test/CodeGen/AMDGPU/fptrunc.f16.ll [new file with mode: 0644] blob
llvm/test/CodeGen/AMDGPU/fsub.f16.ll [new file with mode: 0644] blob
llvm/test/CodeGen/AMDGPU/half.ll diff | blob | history
llvm/test/CodeGen/AMDGPU/llvm.amdgcn.class.f16.ll [new file with mode: 0644] blob
llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cos.f16.ll [new file with mode: 0644] blob
llvm/test/CodeGen/AMDGPU/llvm.amdgcn.div.fixup.f16.ll [new file with mode: 0644] blob
llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fract.f16.ll [new file with mode: 0644] blob
llvm/test/CodeGen/AMDGPU/llvm.amdgcn.frexp.exp.f16.ll [new file with mode: 0644] blob
llvm/test/CodeGen/AMDGPU/llvm.amdgcn.frexp.mant.f16.ll [new file with mode: 0644] blob
llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ldexp.f16.ll [new file with mode: 0644] blob
llvm/test/CodeGen/AMDGPU/llvm.amdgcn.rcp.f16.ll [new file with mode: 0644] blob
llvm/test/CodeGen/AMDGPU/llvm.amdgcn.rsq.f16.ll [new file with mode: 0644] blob
llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sin.f16.ll [new file with mode: 0644] blob
llvm/test/CodeGen/AMDGPU/llvm.ceil.f16.ll [new file with mode: 0644] blob
llvm/test/CodeGen/AMDGPU/llvm.cos.f16.ll [new file with mode: 0644] blob
llvm/test/CodeGen/AMDGPU/llvm.exp2.f16.ll [new file with mode: 0644] blob
llvm/test/CodeGen/AMDGPU/llvm.floor.f16.ll [new file with mode: 0644] blob
llvm/test/CodeGen/AMDGPU/llvm.fma.f16.ll [new file with mode: 0644] blob
llvm/test/CodeGen/AMDGPU/llvm.fmuladd.f16.ll [new file with mode: 0644] blob
llvm/test/CodeGen/AMDGPU/llvm.log2.f16.ll [new file with mode: 0644] blob
llvm/test/CodeGen/AMDGPU/llvm.maxnum.f16.ll [new file with mode: 0644] blob
llvm/test/CodeGen/AMDGPU/llvm.minnum.f16.ll [new file with mode: 0644] blob
llvm/test/CodeGen/AMDGPU/llvm.rint.f16.ll [new file with mode: 0644] blob
llvm/test/CodeGen/AMDGPU/llvm.sin.f16.ll [new file with mode: 0644] blob
llvm/test/CodeGen/AMDGPU/llvm.sqrt.f16.ll [new file with mode: 0644] blob
llvm/test/CodeGen/AMDGPU/llvm.trunc.f16.ll [new file with mode: 0644] blob
llvm/test/CodeGen/AMDGPU/sint_to_fp.i64.ll diff | blob | history
llvm/test/CodeGen/AMDGPU/sitofp.f16.ll [new file with mode: 0644] blob
llvm/test/CodeGen/AMDGPU/uint_to_fp.i64.ll diff | blob | history
llvm/test/CodeGen/AMDGPU/uitofp.f16.ll [new file with mode: 0644] blob
llvm/test/CodeGen/AMDGPU/v_mac_f16.ll [new file with mode: 0644] blob
llvm/test/CodeGen/AMDGPU/v_madak_f16.ll [new file with mode: 0644] blob
llvm/test/MC/Disassembler/AMDGPU/sdwa_vi.txt diff | blob | history
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