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(parent: b04e48b) | patch
drm/amdgpu: fix up DCHUBBUB_SDPIF_MMIO_CNTRL_0 handling
authorAlex Deucher <alexander.deucher@amd.com>
Tue, 18 Aug 2020 23:24:03 +0000 (19:24 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Wed, 26 Aug 2020 20:40:18 +0000 (16:40 -0400)
commitf8646661f713fb7d33ebe404d418bd3fa55c383e
tree473f046a55f7336acdf0950ae8956bb8424d8441tree | snapshot
parentb04e48bcac08ae900b5ea77a86f90356f51cf26ccommit | diff
drm/amdgpu: fix up DCHUBBUB_SDPIF_MMIO_CNTRL_0 handling

Properly define this register using a relative offset rather
than an absolute offset and use the proper SOC15 macros to
access it.  It's also DCN, not DCE, so remove it from the
DCE12 header.

No functional change.

Acked-by: Nirmoy Das <nirmoy.das@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c diff | blob | history
drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_offset.h diff | blob | history
Domain: System / Kernel;