X86: Added MPX feature and bound registers.
authorElena Demikhovsky <elena.demikhovsky@intel.com>
Wed, 3 Jun 2015 10:30:57 +0000 (10:30 +0000)
committerElena Demikhovsky <elena.demikhovsky@intel.com>
Wed, 3 Jun 2015 10:30:57 +0000 (10:30 +0000)
commitf7e641cc2df5b90c0c8a5a544553c9121b89eb92
treed96be136362aeb2dc9d1bdaa3d74c8fcac14378c
parent8b2354de81ac72cfb97320c6cb6c42321421ff35
X86: Added MPX feature and bound registers.
IntelĀ® Memory Protection Extensions (IntelĀ® MPX) is a new feature in Skylake.
It is a part of KNL and SKX sets. It is also a part of Skylake client.

I added definition of %bnd0 - %bnd3 registers, each register is a pair of 64-bit integers.

llvm-svn: 238916
llvm/lib/Target/X86/X86.td
llvm/lib/Target/X86/X86InstrInfo.td
llvm/lib/Target/X86/X86RegisterInfo.td
llvm/lib/Target/X86/X86Subtarget.cpp
llvm/lib/Target/X86/X86Subtarget.h