[AArch64][SVE] Implement additional floating-point arithmetic intrinsics
authorKerry McLaughlin <kerry.mclaughlin@arm.com>
Thu, 14 Nov 2019 11:35:38 +0000 (11:35 +0000)
committerKerry McLaughlin <kerry.mclaughlin@arm.com>
Thu, 14 Nov 2019 11:35:50 +0000 (11:35 +0000)
commitf7848fd8f7b5b58f76ed73d9cabd520024fb5699
tree30c59f7cccca62f5ba256bba8a885c52dde13c7b
parente03a06b348ba49d774aa948f97bce3fac638a797
[AArch64][SVE] Implement additional floating-point arithmetic intrinsics

Summary:
Adds intrinsics for the following:
  - ftssel
  - fcadd, fcmla
  - fmla, fmls, fnmla, fnmls
  - fmad, fmsb, fnmad, fnmsb

Reviewers: sdesmalen, huntergr, dancgr, mgudim

Reviewed By: sdesmalen

Subscribers: tschuett, kristof.beyls, hiraditya, rkruppe, psnobl, cameron.mcinally, cfe-commits, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D69707
llvm/include/llvm/IR/IntrinsicsAArch64.td
llvm/lib/Target/AArch64/AArch64InstrFormats.td
llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
llvm/lib/Target/AArch64/SVEInstrFormats.td
llvm/test/CodeGen/AArch64/sve-intrinsics-fp-arith.ll