[RISCV] Add a test showing incorrect RVV stack alignment
authorFraser Cormack <fraser@codeplay.com>
Fri, 1 Oct 2021 11:45:43 +0000 (12:45 +0100)
committerFraser Cormack <fraser@codeplay.com>
Tue, 17 May 2022 14:53:53 +0000 (15:53 +0100)
commitf7709a059ac0ef1edaa2dc83321a4d972933e975
treed29521e87256349d3befe3dadb3f09eb79c87d0f
parent5b00d13c00712de5161935d3d6b7af55cb8f3eb5
[RISCV] Add a test showing incorrect RVV stack alignment

The RISC-V stack is assumed to be aligned to 16 bytes and can handle stack
realignment for larger objects, but the "RVV stack" is only ensured to be
aligned to 8 bytes. This means that objects specified at a larger alignment may
be misaligned, not only for 16-byte-aligned RVV objects that don't trigger
realignment, but also for 32-byte-and-larger-aligned objects which do.

The new test checks a variety of alignment configurations, showing the
misaligned cases.

Reviewed By: reames

Differential Revision: https://reviews.llvm.org/D110933
llvm/test/CodeGen/RISCV/rvv/rvv-stack-align.mir [new file with mode: 0644]