intel/isl: Add more PRM text for HiZ/STC requirement
authorNanley Chery <nanley.g.chery@intel.com>
Tue, 1 Feb 2022 19:02:16 +0000 (14:02 -0500)
committerMarge Bot <emma+marge@anholt.net>
Wed, 2 Feb 2022 16:25:10 +0000 (16:25 +0000)
commitf724f95542b2f7029608e9689a6d8cd386b5b42c
tree945229600b7742d044fbf410b34cf56c5ed40f64
parentbc9ce9705c0e1fc76228ca4914fa2ce1e06a4394
intel/isl: Add more PRM text for HiZ/STC requirement

Add text describing why HierarchicalDepthBufferEnable must be set along
with SeparateStencilBufferEnable.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14825>
src/intel/isl/isl_emit_depth_stencil.c