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(parent: d019dbf) | patch
[mips] Refactor conditional branch instructions with two register operands.
authorAkira Hatanaka <ahatanaka@mips.com>
Thu, 20 Dec 2012 04:10:13 +0000 (04:10 +0000)
committerAkira Hatanaka <ahatanaka@mips.com>
Thu, 20 Dec 2012 04:10:13 +0000 (04:10 +0000)
commitf71ffd29d9fffd9b8ab95363809901c2072b327f
treed8059343e9c15f55c26e1473bf8b3514196e0069tree | snapshot
parentd019dbf75efa952bef5eba000f808b945df09821commit | diff
[mips] Refactor conditional branch instructions with two register operands.
Separate encoding information from the rest.

llvm-svn: 170657
llvm/lib/Target/Mips/Mips64InstrInfo.td diff | blob | history
llvm/lib/Target/Mips/MipsInstrFormats.td diff | blob | history
llvm/lib/Target/Mips/MipsInstrInfo.td diff | blob | history
Domain: System / Toolchain;