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(parent: 279943e) | patch
[SVE][CodeGen] Lower floating point -> integer conversions
authorKerry McLaughlin <kerry.mclaughlin@arm.com>
Thu, 17 Sep 2020 10:52:14 +0000 (11:52 +0100)
committerKerry McLaughlin <kerry.mclaughlin@arm.com>
Thu, 17 Sep 2020 13:04:22 +0000 (14:04 +0100)
commitf7185b271f5b3010c82a56417b437f2a44a79230
tree48932451d8f4b735d6ffede07b3b89d091f9f613tree | snapshot
parent279943edf87887403fce72c505f9760764e416f0commit | diff
[SVE][CodeGen] Lower floating point -> integer conversions

This patch adds new ISD nodes, FCVTZS_MERGE_PASSTHRU &
FCVTZU_MERGE_PASSTHRU, which are used to lower scalable vector
FP_TO_SINT/FP_TO_UINT operations and the following intrinsics:
 - llvm.aarch64.sve.fcvtzu
 - llvm.aarch64.sve.fcvtzs

Reviewed By: efriedma, paulwalker-arm

Differential Revision: https://reviews.llvm.org/D87232
llvm/lib/Target/AArch64/AArch64ISelLowering.cpp diff | blob | history
llvm/lib/Target/AArch64/AArch64ISelLowering.h diff | blob | history
llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td diff | blob | history
llvm/lib/Target/AArch64/SVEInstrFormats.td diff | blob | history
llvm/test/CodeGen/AArch64/sve-fcvt.ll [new file with mode: 0644] blob
llvm/test/CodeGen/AArch64/sve-split-fcvt.ll [new file with mode: 0644] blob
Domain: System / Toolchain;