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(parent: cdd21b3) | patch
Remove the G8RC_NOX0_and_GPRC_NOR0 PPC register class
authorHal Finkel <hfinkel@anl.gov>
Thu, 21 Mar 2013 23:45:03 +0000 (23:45 +0000)
committerHal Finkel <hfinkel@anl.gov>
Thu, 21 Mar 2013 23:45:03 +0000 (23:45 +0000)
commitf70c41ea7c524dd78b154490a7479244f19f63f4
tree92e974304922be160c6199ee8925c0188f5958fbtree | snapshot
parentcdd21b333a9b495f41fda81b5240360dcba06f7acommit | diff
Remove the G8RC_NOX0_and_GPRC_NOR0 PPC register class

As Jakob pointed out in his review of r177423, having a shared ZERO
register between the 32- and 64-bit register classes causes this
odd G8RC_NOX0_and_GPRC_NOR0 class to be created. As recommended,
this adds a ZERO8 register which differentiates the 32- and 64-bit
zeros.

No functionality change intended.

llvm-svn: 177683
llvm/lib/Target/PowerPC/PPCISelLowering.cpp diff | blob | history
llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp diff | blob | history
llvm/lib/Target/PowerPC/PPCRegisterInfo.td diff | blob | history
Domain: System / Toolchain;