rs6000: Support doubleword swaps removal in rot64 load store [PR100085]

rs6000: Support doubleword swaps removal in rot64 load store [PR100085]

On P8LE, extra rot64+rot64 load or store instructions are generated
in float128 to vector __int128 conversion.

This patch teaches pass swaps to also handle such pattens to remove
extra swap instructions.

(insn 7 6 8 2 (set (subreg:V1TI (reg:KF 123) 0)
        (rotate:V1TI (mem/u/c:V1TI (reg/f:DI 121) [0  S16 A128])
	            (const_int 64 [0x40]))) {*vsx_le_permute_v1ti})
(insn 8 7 9 2 (set (subreg:V1TI (reg:KF 122) 0)
        (rotate:V1TI (subreg:V1TI (reg:KF 123) 0)
	            (const_int 64 [0x40])))  {*vsx_le_permute_v1ti})
=>
(insn 22 6 23 2 (set (subreg:V1TI (reg:KF 123) 0)
        (mem/u/c:V1TI (and:DI (reg/f:DI 121)
	          (const_int -16 [0xfffffffffffffff0])) [0  S16 A128])))
(insn 23 22 25 2 (set (subreg:V1TI (reg:KF 122) 0)
        (subreg:V1TI (reg:KF 123) 0)))

gcc/ChangeLog:

2021-06-09  Xionghu Luo  <luoxhu@linux.ibm.com>

	* config/rs6000/rs6000-p8swap.c (pattern_is_rotate64): New.
	(insn_is_load_p): Use pattern_is_rotate64.
	(insn_is_swap_p): Likewise.
	(quad_aligned_load_p): Likewise.
	(const_load_sequence_p): Likewise.
	(replace_swapped_aligned_load): Likewise.
	(recombine_lvx_pattern): Likewise.
	(recombine_stvx_pattern): Likewise.

gcc/testsuite/ChangeLog:

2021-06-09  Xionghu Luo  <luoxhu@linux.ibm.com>

	* gcc.target/powerpc/float128-call.c: Adjust.
	* gcc.target/powerpc/pr100085.c: New test.