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(parent: ee96342) | patch
drm/i915/display/dp: 128/132b LT requirement
authorArun R Murthy <arun.r.murthy@intel.com>
Tue, 25 Apr 2023 02:59:44 +0000 (08:29 +0530)
committerJani Nikula <jani.nikula@intel.com>
Tue, 2 May 2023 13:18:09 +0000 (16:18 +0300)
commitf60500f31e99fe5e641071d2ed4a8164a8050701
tree8f322711bb99346400deb6fcc630911fd26a1ba1tree | snapshot
parentee9634282d875083b2a172f0181f5fe6be50c524commit | diff
drm/i915/display/dp: 128/132b LT requirement

For 128b/132b LT prior to LT DPTX should set power state, DP channel
coding and then link rate.

v2: added separate function to avoid code duplication(Jani N)
v3: DP2.1 section 3.5.2.16 is ordered, 3.5.1.2 is unordered and hence
    discarding <Ville>

Signed-off-by: Arun R Murthy <arun.r.murthy@intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230425025944.151744-1-arun.r.murthy@intel.com
drivers/gpu/drm/i915/display/intel_dp_link_training.c diff | blob | history
Domain: System / Kernel;