[Driver][RISCV] Adjust the priority between -mcpu, -mtune and -march
authorKito Cheng <kito.cheng@sifive.com>
Fri, 30 Dec 2022 06:59:40 +0000 (14:59 +0800)
committerKito Cheng <kito.cheng@sifive.com>
Fri, 13 Jan 2023 15:58:31 +0000 (23:58 +0800)
commitf601039e8165cb2a49c783ccf4aafd1f7b326a63
tree4885425936114f2884df218d30bb951a45f7d4b6
parentbe4c5ad54c929f2d817ab4a55707f0beda73a05f
[Driver][RISCV] Adjust the priority between -mcpu, -mtune and -march

RISC-V supports `-march`, `-mtune`, and `-mcpu`: `-march` provides the
architecture extension information, `-mtune` provide the pipeline model, and
`-mcpu` provides both.

What's the priority among those options for now(w/o this patch)?

Pipeline model:
- Take from `-mtune` if present.
- Take from `-mcpu` if present
- Use the default pipeline model: `generic-rv32` or `generic-rv64`
Architecture extension has quite complicated behavior now:
- Take union from `-march` and `-mcpu` if both are present.
- Take from `-march` if present.
- Take from `-mcpu` if present.
- Implied from `-mabi` if present.
- Use the default architecture depending on the target triple

We treat `-mcpu`/`-mtune` and `-mcpu`/`-march` differently, and it's
kind of counterintuitive: -march is explicitly specified but ignored.

This patch adjusts the priority between `-mcpu`/`-march`, letting it use
architecture extension information from `-march` if it's present.

So the priority of architecture extension information becomes:
- Take from `-march` if present.
- Take from `-mcpu` if present.
- Implied from `-mabi` if present.
- Use the default architecture depending on the target triple

And this also match what we implement in RISC-V GCC too.

Reviewed By: craig.topper, MaskRay

Differential Revision: https://reviews.llvm.org/D140693
clang/docs/ReleaseNotes.rst
clang/lib/Driver/ToolChains/Arch/RISCV.cpp
clang/test/Driver/riscv-cpus.c
clang/test/Driver/riscv-default-features.c
clang/test/Driver/riscv-march-mcpu-mtune.c [new file with mode: 0644]
llvm/include/llvm/Support/RISCVISAInfo.h
llvm/lib/Support/RISCVISAInfo.cpp