mtd: nand: omap: optimize chip->ecc.hwctl() for H/W ECC schemes
authorpekon gupta <pekon@ti.com>
Tue, 19 Nov 2013 05:32:15 +0000 (11:02 +0530)
committerScott Wood <scottwood@freescale.com>
Tue, 4 Mar 2014 02:09:03 +0000 (20:09 -0600)
commitf5f1f614bda83fae868d5634f86e0098162ceb3b
tree2ff7fa042001df8660f8245c2fb3efc108694613
parenteeb72e67619b98d2502fe634a3a5d9953de92ad0
mtd: nand: omap: optimize chip->ecc.hwctl() for H/W ECC schemes

chip->ecc.hwctl() is used for preparing the H/W controller before read/write
NAND accesses (like assigning data-buf, enabling ECC scheme configs, etc.)

Though all ECC schemes in OMAP NAND driver use GPMC controller for generating
ECC syndrome (for both Read/Write accesses). But but in current code
HAM1_ECC and BCHx_ECC schemes implement individual function to achieve this.
This patch
(1) removes omap_hwecc_init() and omap_hwecc_init_bch()
as chip->ecc.hwctl will re-initializeGPMC before every read/write call.
omap_hwecc_init_bch() -> omap_enable_ecc_bch()

(2) merges the GPMC configuration code for all ECC schemes into
single omap_enable_hwecc(), thus adding scalability for future ECC schemes.
omap_enable_hwecc() + omap_enable_ecc_bch() -> omap_enable_hwecc()

Signed-off-by: Pekon Gupta <pekon@ti.com>
arch/arm/include/asm/omap_gpmc.h
drivers/mtd/nand/omap_gpmc.c