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(merge: 576d6b4 a9003f7)
Merge tag 'renesas-clk-fixes-for-v6.1-tag1'
authorGeert Uytterhoeven <geert+renesas@glider.be>
Wed, 26 Oct 2022 10:37:51 +0000 (12:37 +0200)
committerGeert Uytterhoeven <geert+renesas@glider.be>
Wed, 26 Oct 2022 10:37:51 +0000 (12:37 +0200)
commitf5684bde0375f4feb2a9ed1c146df29437652e70
tree5de0ff7d5fb8c5d92122091f96dfd518c9f256cetree | snapshot
parent576d6b40dcceade7d77e88f63e621349c6937bc3commit | diff
parenta9003f74f5a2f487e101f3aa1dd5c3d3a78c6999commit | diff
Merge tag 'renesas-clk-fixes-for-v6.1-tag1'

clk: renesas: Fixes for v6.1

  - Correct the parent clocks for the High Speed Serial Communication
    Interfaces with FIFO (HSCIF) modules on the R-Car V4H SoC.
    Note that HSCIF0 is used for the serial console on the White-Hawk
    development board.
drivers/clk/renesas/r8a779g0-cpg-mssr.c diff1 | diff2 | blob | history
Domain: System / Kernel;