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(parent: 11bf53a) | patch
phy: qcom-qmp-pcie: Support SM8450 PCIe1 PHY in EP mode
authorDmitry Baryshkov <dmitry.baryshkov@linaro.org>
Tue, 27 Sep 2022 09:22:04 +0000 (12:22 +0300)
committerVinod Koul <vkoul@kernel.org>
Mon, 17 Oct 2022 07:44:24 +0000 (13:14 +0530)
commitf5682f13b7ab0bbdffd11934afe4b5c011d5be74
treecb3ef857b7ca7ce0e38a01822b20749453e53ba2tree | snapshot
parent11bf53a38c82baef349b4efc6a84f069dab7085acommit | diff
phy: qcom-qmp-pcie: Support SM8450 PCIe1 PHY in EP mode

Add support for using PCIe1 (gen4x2) in EP mode on SM8450. The tables to
program are mostly common with the RC mode tables, so only register
difference are split into separate RC and EP tables.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20220927092207.161501-4-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
drivers/phy/qualcomm/phy-qcom-qmp-pcie.c diff | blob | history
drivers/phy/qualcomm/phy-qcom-qmp-pcs-pcie-v5_20.h diff | blob | history
Domain: System / Kernel;