i2c: piix4: Add support for AMD ML and CZ SMBus changes
authorShane Huang <shane.huang@amd.com>
Wed, 22 Jan 2014 22:05:46 +0000 (14:05 -0800)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Thu, 6 Feb 2014 19:34:07 +0000 (11:34 -0800)
commitf52c045e05025727da918570fb9ac29f3239caaf
tree0d38adf79b794fd768d47b4bfe9ca4937543844f
parentc1d9c71fc913e93307ddae3ff140684e3dae9deb
i2c: piix4: Add support for AMD ML and CZ SMBus changes

commit 032f708bc4f6da868ec49dac48ddf3670d8035d3 upstream.

The locations of SMBus register base address and enablement bit are changed
from AMD ML, which need this patch to be supported.

Signed-off-by: Shane Huang <shane.huang@amd.com>
Reviewed-by: Jean Delvare <khali@linux-fr.org>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Documentation/i2c/busses/i2c-piix4
drivers/i2c/busses/Kconfig
drivers/i2c/busses/i2c-piix4.c