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(parent: 8174945) | patch
i965/vs: Implement proper register allocation instead of 1:1 mapping.
authorEric Anholt <eric@anholt.net>
Tue, 16 Aug 2011 22:28:53 +0000 (15:28 -0700)
committerEric Anholt <eric@anholt.net>
Sat, 20 Aug 2011 00:06:29 +0000 (17:06 -0700)
commitf4db75547f38f08665efac3daf1599fdc5594bb7
treec471ade95caca6592811fe24e7ea3cf2c20eaf59tree | snapshot
parent8174945d3346dc049ae56dcb4bf1eab39f5c88aacommit | diff
i965/vs: Implement proper register allocation instead of 1:1 mapping.

Fixes vs-atan-* and several others.  This is not the real solution we
eventually want, which will pack floats, vec2s, and vec3s into vec4
registers, but this code should provide the framework for that.
src/mesa/drivers/dri/i965/brw_context.h diff | blob | history
src/mesa/drivers/dri/i965/brw_vec4_reg_allocate.cpp diff | blob | history
Domain: Graphics System / GL;