[LLDB][RISCV] Add DWARF Registers
authorEmmmer <yjhdandan@163.com>
Thu, 28 Jul 2022 07:38:33 +0000 (15:38 +0800)
committerEmmmer <yjhdandan@163.com>
Sat, 30 Jul 2022 04:05:55 +0000 (12:05 +0800)
commitf473558647705a042de9d5ec96c23a21f2005bb1
treee2dc91b9df41a64fbba385cad230bca614cab7f2
parent12df3080fea1660d8844857f92949e1422eb526d
[LLDB][RISCV] Add DWARF Registers

According to [RISC-V DWARF Specification](https://github.com/riscv-non-isa/riscv-elf-psabi-doc/blob/master/riscv-dwarf.adoc) add RISCV DWARF Registers.

Don't worry about the difference between riscv32 and riscv64, they just have different bytes of registers.

Reviewed By: DavidSpickett

Differential Revision: https://reviews.llvm.org/D130686
lldb/source/Utility/RISCV_DWARF_Registers.h [new file with mode: 0644]