ARM: 7938/1: OMAP4/highbank: Flush L2 cache before disabling
authorTaras Kondratiuk <taras.kondratiuk@linaro.org>
Fri, 10 Jan 2014 00:27:08 +0000 (01:27 +0100)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Sat, 25 Jan 2014 16:49:30 +0000 (08:49 -0800)
commitf440ce0a108cd7e800894b89dcdf053aff09daad
treeba9e7d58b46296b80aed9747e18c34b53940bd85
parent94e61221d5c23789da5925c7f6dafdcf3491354d
ARM: 7938/1: OMAP4/highbank: Flush L2 cache before disabling

commit b25f3e1c358434bf850220e04f28eebfc45eb634 upstream.

Kexec disables outer cache before jumping to reboot code, but it doesn't
flush it explicitly. Flush is done implicitly inside of l2x0_disable().
But some SoC's override default .disable handler and don't flush cache.
This may lead to a corrupted memory during Kexec reboot on these
platforms.

This patch adds cache flush inside of OMAP4 and Highbank outer_cache.disable()
handlers to make it consistent with default l2x0_disable().

Acked-by: Rob Herring <rob.herring@calxeda.com>
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Taras Kondratiuk <taras.kondratiuk@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Cc: Wang Nan <wangnan0@huawei.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
arch/arm/mach-highbank/highbank.c
arch/arm/mach-omap2/omap4-common.c