[AArch64][GlobalISel] Mark v16s8 <- v8s8, v8s8 G_CONCAT_VECTOR as legal
authorJessica Paquette <jpaquette@apple.com>
Wed, 4 Aug 2021 23:33:40 +0000 (16:33 -0700)
committerJessica Paquette <jpaquette@apple.com>
Thu, 5 Aug 2021 16:40:46 +0000 (09:40 -0700)
commitf3f3098afe1ca21671922e39328f127e79b7dd3c
tree53e36fc6fff7c0ceedfe4835f93048c1b7c55cce
parent180f4a87c5cfa0133ec4d4554350e38e672a145c
[AArch64][GlobalISel] Mark v16s8 <- v8s8, v8s8 G_CONCAT_VECTOR as legal

G_CONCAT_VECTORS shows up from time to time when legalizing other instructions.

We actually import patterns for the v16s8 <- v8s8, v8s8 case so marking it
as legal gives us selection for free.

Differential Revision: https://reviews.llvm.org/D107512
llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
llvm/test/CodeGen/AArch64/GlobalISel/legalize-concat-vectors.mir
llvm/test/CodeGen/AArch64/GlobalISel/select-concat-vectors.mir