[RISCV] Add missing VL arguments to the creation of RISCVISD::VMV_V_X_VL nodes.
authorCraig Topper <craig.topper@sifive.com>
Mon, 3 Oct 2022 18:54:03 +0000 (11:54 -0700)
committerCraig Topper <craig.topper@sifive.com>
Mon, 3 Oct 2022 19:21:05 +0000 (12:21 -0700)
commitf3e87a63e50bac4c7e21fbe229dc5aefae32555c
tree11e300aae72fa8118d6025f7414253252dc76a36
parent403d0b7a4e13e8e3bcaa1a0c57ab66ffe761c7af
[RISCV] Add missing VL arguments to the creation of RISCVISD::VMV_V_X_VL nodes.

VMV_V_X_VL nodes should always have a passthru, a splat, and a VL.
We were sometimes missing the VL.

This went unnoticed because these cases were all selected into the
following node to form a .vx or .vi instruction. The ComplexPattern
that does this, doesn't check the VL operand. I've added an assert
to the ComplexPattern to catch if the operand is missing.

@qcolombet spotted some of these in D134703.
llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
llvm/lib/Target/RISCV/RISCVISelLowering.cpp
llvm/test/CodeGen/RISCV/rvv/stepvector.ll