clk: samsung: exynos7885: Implement CMU_FSYS domain
authorDavid Virag <virag.david003@gmail.com>
Wed, 1 Jun 2022 23:37:41 +0000 (01:37 +0200)
committerKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Tue, 23 Aug 2022 06:04:43 +0000 (09:04 +0300)
commitf392db97b7bbdc636fc92bb396eb7a0fa4c44691
treeb5ceac649584150dfa4da3c3e6350fd2ae8b3c9f
parent777aaf3d1daf793461269b49c063aca1cee06a44
clk: samsung: exynos7885: Implement CMU_FSYS domain

CMU_FSYS clock domain provides clocks for FSYS IP-core providing clocks
for all MMC devices on Exynos7885, and USB30DRD.

Add clocks:
  - Bus clocks in CMU_TOP needed for CMU_FSYS
  - All clocks in CMU_FSYS needed for MMC devices

Signed-off-by: David Virag <virag.david003@gmail.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220601233743.56317-4-virag.david003@gmail.com
drivers/clk/samsung/clk-exynos7885.c