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(parent: 9751e61) | patch
[AArch64][CallLowering] Constraint registers on target specific instruction
authorQuentin Colombet <qcolombet@apple.com>
Thu, 22 Dec 2016 21:56:31 +0000 (21:56 +0000)
committerQuentin Colombet <qcolombet@apple.com>
Thu, 22 Dec 2016 21:56:31 +0000 (21:56 +0000)
commitf38015e5fef7298f7f38ae5440442b16c33e8e92
treeb58431e684c27f8e6c8fe7919234908ed806f8f8tree | snapshot
parent9751e61fe1ce38ad3b6fcb550c28af41f7cad44ccommit | diff
[AArch64][CallLowering] Constraint registers on target specific instruction

The InstructionSelect pass will not look at target specific instructions
since they are already selected. As a result, the operands of target
specific instructions must be properly constrained, because it is not
going to fix them.

This fixes invalid register classes on call instruction.

llvm-svn: 290377
llvm/lib/Target/AArch64/AArch64CallLowering.cpp diff | blob | history
llvm/test/CodeGen/AArch64/GlobalISel/call-translator.ll diff | blob | history
Domain: System / Toolchain;