drm/i915/dp: For PCON TMDS mode set only the relavant bits in config DPCD
authorAnkit Nautiyal <ankit.k.nautiyal@intel.com>
Wed, 10 Nov 2021 07:29:47 +0000 (12:59 +0530)
committerUma Shankar <uma.shankar@intel.com>
Thu, 11 Nov 2021 09:15:09 +0000 (14:45 +0530)
commitf35294e13c19bf890f26bc1ec964b2d29c82f0ec
treec998b97894c8241aca1876d9a9d0966f9f678ff2
parent078e2bb2585a05df787be74642f12354a66a0534
drm/i915/dp: For PCON TMDS mode set only the relavant bits in config DPCD

Currently we reset the whole PCON linkConfig DPCD to set the TMDS mode.
This also resets the Source control bit and HDMI link enable bit and
goes to autonomous mode of operation, which is seen to spoil the PCONs
internal state.

This patch avoids resetting the PCON link config register and sets only
the source control bit, with FRL Enable bit set to 0 (TMDS mode) in the
configuration DPCD. It then enables the HDMI Link Enable bit.

v2: Removed the redundant resetting of the bits as the buffer is already
initialized to 0. (Uma)
Updated comments and commit message.

v3: Rebase

Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Reviewed-by: Uma Shankar <uma.shankar@intel.com>
Signed-off-by: Uma Shankar <uma.shankar@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20211110072947.171659-3-ankit.k.nautiyal@intel.com
drivers/gpu/drm/i915/display/intel_dp.c