Relanding r368987 [AArch64] Change location of frame-record within callee-save area.
authorSander de Smalen <sander.desmalen@arm.com>
Fri, 16 Aug 2019 15:42:28 +0000 (15:42 +0000)
committerSander de Smalen <sander.desmalen@arm.com>
Fri, 16 Aug 2019 15:42:28 +0000 (15:42 +0000)
commitf28e1128d9efb7c26adb50a1521db181a1b76f09
treeb5df364a76cf1e677aeda75fb2e701ce0be97041
parent2d3ebeb81395644902c8d69cce3ec19e404d840a
Relanding r368987 [AArch64] Change location of frame-record within callee-save area.

Changes:
There was a condition for `!NeedsFrameRecord` missing in the assert. The
assert in question has changed to:

+    assert((!RPI.isPaired() || !NeedsFrameRecord || RPI.Reg2 != AArch64::FP ||
+            RPI.Reg1 == AArch64::LR) &&
+           "FrameRecord must be allocated together with LR");

This addresses PR43016.

llvm-svn: 369122
32 files changed:
llvm/lib/Target/AArch64/AArch64CallingConvention.td
llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
llvm/lib/Target/AArch64/AArch64RegisterInfo.cpp
llvm/test/CodeGen/AArch64/aarch64-dynamic-stack-layout.ll
llvm/test/CodeGen/AArch64/aarch64-vector-pcs.mir
llvm/test/CodeGen/AArch64/addsub-constant-folding.ll
llvm/test/CodeGen/AArch64/alloca.ll
llvm/test/CodeGen/AArch64/arm64-alloca-frame-pointer-offset.ll
llvm/test/CodeGen/AArch64/cgp-usubo.ll
llvm/test/CodeGen/AArch64/fast-isel-sp-adjust.ll
llvm/test/CodeGen/AArch64/irg_sp_tagp.ll
llvm/test/CodeGen/AArch64/regress-w29-reserved-with-fp.ll
llvm/test/CodeGen/AArch64/reverse-csr-restore-seq.mir
llvm/test/CodeGen/AArch64/seh-finally.ll
llvm/test/CodeGen/AArch64/shadow-call-stack.ll
llvm/test/CodeGen/AArch64/sink-copy-for-shrink-wrap.ll
llvm/test/CodeGen/AArch64/spill-stack-realignment.mir
llvm/test/CodeGen/AArch64/sponentry.ll
llvm/test/CodeGen/AArch64/stack-guard-reassign.ll
llvm/test/CodeGen/AArch64/stack-guard-vaarg.ll
llvm/test/CodeGen/AArch64/unfold-masked-merge-scalar-constmask-innerouter.ll
llvm/test/CodeGen/AArch64/unfold-masked-merge-scalar-constmask-interleavedbits.ll
llvm/test/CodeGen/AArch64/unfold-masked-merge-scalar-constmask-interleavedbytehalves.ll
llvm/test/CodeGen/AArch64/unfold-masked-merge-scalar-constmask-lowhigh.ll
llvm/test/CodeGen/AArch64/unfold-masked-merge-scalar-variablemask.ll
llvm/test/CodeGen/AArch64/unreachable-emergency-spill-slot.mir
llvm/test/CodeGen/AArch64/win64_vararg.ll
llvm/test/CodeGen/AArch64/wineh-frame5.mir
llvm/test/CodeGen/AArch64/wineh-frame7.mir
llvm/test/CodeGen/AArch64/wineh-try-catch-realign.ll
llvm/test/CodeGen/AArch64/wineh-try-catch.ll
llvm/test/CodeGen/AArch64/wineh_shrinkwrap.mir