arm64: errata: Hide CTR_EL0.DIC on systems affected by Neoverse-N1 #1542419
authorJames Morse <james.morse@arm.com>
Fri, 24 Apr 2020 16:38:02 +0000 (17:38 +0100)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Wed, 29 Apr 2020 14:32:56 +0000 (16:32 +0200)
commitf2791551cedb5c295528b00c74d0a02d62c4bd92
tree4c89722b1a496c52658f08e035f72a049ec6a137
parent4b823bf7c2cad42d517d736a44b36b5bd97e0430
arm64: errata: Hide CTR_EL0.DIC on systems affected by Neoverse-N1 #1542419

[ Upstream commit 05460849c3b51180d5ada3373d0449aea19075e4 ]

Cores affected by Neoverse-N1 #1542419 could execute a stale instruction
when a branch is updated to point to freshly generated instructions.

To workaround this issue we need user-space to issue unnecessary
icache maintenance that we can trap. Start by hiding CTR_EL0.DIC.

Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: James Morse <james.morse@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: James Morse <james.morse@arm.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
Documentation/arm64/silicon-errata.rst
arch/arm64/Kconfig
arch/arm64/include/asm/cpucaps.h
arch/arm64/kernel/cpu_errata.c
arch/arm64/kernel/traps.c