clk: mediatek: Remove CLK_SET_PARENT from all MSDC core clocks
authorAngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Tue, 16 May 2023 13:52:05 +0000 (15:52 +0200)
committerStephen Boyd <sboyd@kernel.org>
Tue, 13 Jun 2023 01:20:04 +0000 (18:20 -0700)
commitf235f6ae59e5060af6d924038348f94a6348ee8d
tree1b285646e19ac33b18fb003f39f29aebadec6efc
parent1775790eff4a8fa885db189c75f4ce98e7a6a1dc
clk: mediatek: Remove CLK_SET_PARENT from all MSDC core clocks

Various MSDC core clocks, used for multiple MSDC controller instances,
share the same parent(s): in order to add parents selection in the
mtk-sd driver to achieve an accurate clock rate for all modes, remove
the CLK_SET_RATE_PARENT flag from all MSDC clocks for all SoCs: this
will make sure that a clk_set_rate() call performed for a clock on
a secondary controller will not change the rate of a common parent,
which would result in an overclock or underclock of one of the
controllers.

Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com>
Reviewed-by: Markus Schneider-Pargmann <msp@baylibre.com>
Link: https://lore.kernel.org/r/20230516135205.372951-3-angelogioacchino.delregno@collabora.com
Tested-by: Alexandre Mergnat <amergnat@baylibre.com>
Reviewed-by: Alexandre Mergnat <amergnat@baylibre.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
drivers/clk/mediatek/clk-mt6765.c
drivers/clk/mediatek/clk-mt6779.c
drivers/clk/mediatek/clk-mt7981-topckgen.c
drivers/clk/mediatek/clk-mt7986-topckgen.c
drivers/clk/mediatek/clk-mt8173-topckgen.c
drivers/clk/mediatek/clk-mt8183.c
drivers/clk/mediatek/clk-mt8186-topckgen.c
drivers/clk/mediatek/clk-mt8188-topckgen.c
drivers/clk/mediatek/clk-mt8192.c
drivers/clk/mediatek/clk-mt8195-topckgen.c
drivers/clk/mediatek/clk-mt8365.c