drm/i915/gt: Set the PP_DIR registers upon enabling ring submission
authorChris Wilson <chris@chris-wilson.co.uk>
Thu, 6 Feb 2020 01:44:38 +0000 (01:44 +0000)
committerChris Wilson <chris@chris-wilson.co.uk>
Thu, 6 Feb 2020 21:07:46 +0000 (21:07 +0000)
commitf21613797bae98773fadc7c383bb7d4259a6096d
tree36b601528fe39108ffb66c25a27dc164c155d1fa
parent602ddb410dff397e791b7caafa2b2d40e5e52a29
drm/i915/gt: Set the PP_DIR registers upon enabling ring submission

Always prime the page table registers before starting the ring. Even
though we will update these to the per-context page tables during
dispatch, it is prudent to ensure that the registers always point to a
valid PD.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20200206014439.2137800-2-chris@chris-wilson.co.uk
drivers/gpu/drm/i915/gt/intel_ring_submission.c