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(parent: f960e39) | patch
intel/isl: Allow creating MCS in Tile4 memory
authorNanley Chery <nanley.g.chery@intel.com>
Thu, 8 Nov 2018 00:39:54 +0000 (16:39 -0800)
committerMarge Bot <emma+marge@anholt.net>
Fri, 21 Jan 2022 20:38:05 +0000 (20:38 +0000)
commitf1f65e5bcf97c0081a073062df9dd9e999913856
treeddfe168bc85f2a09d3a1b274aa39655c1c15cd63tree | snapshot
parentf960e398d383fcf87ba2876323c6935804d3a603commit | diff
intel/isl: Allow creating MCS in Tile4 memory

This enables MCS support on XeHP, now that MCS can be created with a
tiling supported by that platform.

Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14464>
src/intel/isl/isl.c diff | blob | history
src/intel/isl/isl_gfx12.c diff | blob | history
Domain: Graphics System / GL;