PCI/ASPM: Calculate and save the L1.2 timing parameters
authorRajat Jain <rajatja@google.com>
Tue, 3 Jan 2017 06:34:13 +0000 (22:34 -0800)
committerBjorn Helgaas <bhelgaas@google.com>
Tue, 14 Feb 2017 23:44:25 +0000 (17:44 -0600)
commitf1f0366dd6be9624f7d355b72cc909ab821eb4c0
tree272dd86f5011286fc17097b6279f6c4918f4d7c9
parentb5a0a9b59c8185aebcd9a717e2e6258b58c72c06
PCI/ASPM: Calculate and save the L1.2 timing parameters

Calculate and save the timing parameters that need to be programmed if we
need to enable L1.2 substates later.

We use the same logic (and a constant value for 1 of the parameters) as
used by Intel's coreboot:

  https://www.coreboot.org/pipermail/coreboot-gerrit/2015-March/021134.html
  https://review.coreboot.org/#/c/8832/

Signed-off-by: Rajat Jain <rajatja@google.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
drivers/pci/pcie/aspm.c