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(parent: 189a873) | patch
ARM: OMAP4: Make L4SEC clock domain SWSUP only
authorTero Kristo <t-kristo@ti.com>
Wed, 29 Apr 2020 14:30:01 +0000 (17:30 +0300)
committerTony Lindgren <tony@atomide.com>
Tue, 5 May 2020 18:16:06 +0000 (11:16 -0700)
commitf18e314a6bf1b7bdbc6f5af1d6dbda11bc2dd35b
treeee4b76632fba4929e66eac9d22cbfdcdeba68d99tree | snapshot
parent189a8739cc7235f1a6da141439aa8ece72c9f4d2commit | diff
ARM: OMAP4: Make L4SEC clock domain SWSUP only

Commit c2ce5fb3f3f5 ('ARM: OMAP: DRA7xx: Make L4SEC clock domain SWSUP
only') made DRA7 SoC L4SEC clock domain SWSUP only because of power
state transition issues detected with HWSUP mode. Based on
experimentation similar issue exists on OMAP4, so do the same change
for OMAP4 also.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
arch/arm/mach-omap2/clockdomains44xx_data.c diff | blob | history
Domain: System / Kernel;