sim: sh: add missing breaks to bit processing
authorMike Frysinger <vapier@gentoo.org>
Thu, 21 Dec 2023 06:39:01 +0000 (01:39 -0500)
committerMike Frysinger <vapier@gentoo.org>
Thu, 21 Dec 2023 06:46:04 +0000 (01:46 -0500)
commitf184f3a224405473d605ba1d7a455b011e8f2b9e
tree78f5013890413a3706143a2bfce43bd121ff61da
parent4675df34be599589b4a7229b3f87b27f31d7ee2e
sim: sh: add missing breaks to bit processing

Doesn't seem like we want to cascade in this section when bit processing.
sim/sh/gencode.c