ARM process record: VMOV
authorYao Qi <yao.qi@linaro.org>
Fri, 4 Mar 2016 16:02:15 +0000 (16:02 +0000)
committerYao Qi <yao.qi@linaro.org>
Fri, 4 Mar 2016 16:02:15 +0000 (16:02 +0000)
commitf1771dcebf80c75a13ca456491ddfb9b43fcaddf
tree3ed38e990bf78b22eff4c28f2c5686d678e52130
parentca92db2d5885c03d3e0ed23c96b5c6ab336d908d
ARM process record: VMOV

ARM process record gets the wrong register number for VMOV (from core
register to single-precision register).  That is, we should record
the D register rather than the S pseudo register.  The patch also
removes the condition "bit (arm_insn_r->arm_insn, 20)" check, which
has been checked above.

It fixes the following internal error,

(gdb) PASS: gdb.reverse/finish-precsave.exp: BP at end of main
continue^M
Continuing.^M
../../binutils-gdb/gdb/regcache.c:649: internal-error: regcache_raw_read: Assertion `regnum >= 0 && regnum < regcache->descr->nr_raw_registers' failed.^M
A problem internal to GDB has been detected,FAIL: gdb.reverse/finish-precsave.exp: run to end of main (GDB internal error)

gdb:

2016-03-04  Yao Qi  <yao.qi@linaro.org>

* arm-tdep.c (arm_record_vdata_transfer_insn): Simplify the
condition check.  Record the right D register number.
gdb/ChangeLog
gdb/arm-tdep.c