[PowerPC] Clear the sideeffect bit for those instructions that didn't have the match...
authorQingShan Zhang <48825004@qq.com>
Wed, 30 Oct 2019 07:56:35 +0000 (07:56 +0000)
committerQingShan Zhang <48825004@qq.com>
Wed, 30 Oct 2019 07:59:32 +0000 (07:59 +0000)
commitf15cf93899df3e8863207b40c3900facb0ccc356
tree2504e7989d4b4399807b82c533c56e3ce61e9ea3
parent264612e13833ef4018cd3b859b1ea2fe123a5d99
[PowerPC] Clear the sideeffect bit for those instructions that didn't have the match pattern

If the instruction have match pattern, llvm-tblgen will infer the sideeffect bit from the match pattern and it works well.
If not, the tblgen will set it as true that hurt the scheduling.

PowerPC has some instructions that didn't specify the match pattern(i.e. LXSD etc), which is manually selected post-ra according
to the register pressure. We need to clear the sideeffect flag for these instructions.

Differential Revision: https://reviews.llvm.org/D69232
llvm/lib/Target/PowerPC/PPCInstr64Bit.td
llvm/lib/Target/PowerPC/PPCInstrInfo.td
llvm/lib/Target/PowerPC/PPCInstrVSX.td
llvm/test/CodeGen/PowerPC/extract-and-store.ll
llvm/test/CodeGen/PowerPC/scheduling-mem-dependency.ll