crypto: caam - fix snooping for write transactions
authorHoria Geant? <horia.geanta@freescale.com>
Fri, 17 Jul 2015 13:54:52 +0000 (16:54 +0300)
committerHerbert Xu <herbert@gondor.apana.org.au>
Mon, 20 Jul 2015 07:53:41 +0000 (15:53 +0800)
commitf109674951440912b645de2761d5d851e261af98
treed71d16a08892cbad2b3e047d71589cb52b771937
parente27513eb61bae759b7d5f340cf39d60f0d15a00b
crypto: caam - fix snooping for write transactions

HW coherency won't work properly for CAAM write transactions
if AWCACHE is left to default (POR) value - 4'b0001.
It has to be programmed to 4'b0010, i.e. AXI3 Cacheable bit set.

For platforms that have HW coherency support:
-PPC-based: the update has no effect; CAAM coherency already works
due to the IOMMU (PAMU) driver setting the correct memory coherency
attributes
-ARM-based: the update fixes cache coherency issues,
since IOMMU (SMMU) driver is not programmed to behave similar to PAMU

Signed-off-by: Horia Geant? <horia.geanta@freescale.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
drivers/crypto/caam/ctrl.c
drivers/crypto/caam/regs.h